BIT 455
ADVANCED COMPUTER ARCHITECTURE
(ELECTIVE –IV)
Instruction per Week 4 Periods
Duration of University Examination 3 Hours
University Examination 75 Marks
Sessional 25 Marks
UNIT – I
Measuring Performance and Cost: Performance Measurement, Enhancement to Uniprocessor Models, Benchmarks, Basic Model of Advanced Computer Architectures.
UNIT – II
Pipelining and Superscalar Techniques: Basic Pipelining, Data and Control Hazards, Dynamic Instruction Scheduling, Branch Prediction Techniques, Performance Evaluation, Case Study-Sun Microsystems – Microprocessor.
UNIT – III
Vector Processors: Vector Processor Models, Vector Architecture and Design, Performance Evaluation, Programming Vector Processors.
UNIT – IV
Array Processors: Parallel Array Processor Model, Memory Organization, Interconnection, Networks: Performance Measures, Static and Dynamic Topologies.
UNIT - V
Multiprocessors and Multi Computers: Multiprocessor Models, Shared – Memory and Distributed Memory Architectures, Memory Organization, Cache Coherence and Synchronization Mechanisms, Parallel Computer, Performance Models.
Suggested Reading:
- 1)John. L. Hennessey and David A Patterson, “ Computer Architecture - A Quantitative Approach”, 4th Edition, Elsevier, 2007.
- 2)Sajjan G. Shiva, Taylor Series, “ Advanced Computer Architecture”, CRC Press, 2006.
- 3)Kai Hwang, “Advanced Computer Architecture ”, McGraw Hill,