BIT 303                                     WITH EFFECTFROM THE ACADEMIC YEAR 2012-2013

    DIGITAL SIGNAL PROCESSING

  Instruction                                                                                                                          4 Periods per week

  Duration                                                                                                                              3 Hours

  University Examination                                                                                                   75 Marks

  Sessional                                                                                                                             25 Marks

UNIT-I

Basic Elements and advantages of DSP, Discrete time signals and systems, Analysis of discrete time LTI systems, Discrete time system described by difference equation. Review of Z-transforms, Frequency domain sampling, Properties of DFT, Overlap-save method, overlap-add method, Efficient computation of DFT: FFT Algorithm, Direct computation of DFT, Radix-2 FFT Algorithm, MATLAB program for FFT Calculation.

UNIT-II

Design of FIR filters, characteristics of practical frequency selective filters, symmetric and anti symmetric FIR filters. Design of linear face FIR filters using windows. Design of optimum equi-ripple linear face FIR filters. Structure for the realization of discrete time systems: structure for FIR systems, direct form and cascade form structures.

UNIT-III

Design of IIR filters from analog filters. IIR filter design by impulse invariance, bilinear transformation. Butterworth filters, Chebyshev filters. Frequency transformation in analog and digital domains.

Structures for IIR systems, direct form, cascade form, parallel form. Representation of numbers, Round off effect in digital filters.

UNIT-IV

Architectures for Programmable DSP devices: Introduction, basic architectural features, DSP computational Building Blocks (Multiplier, Shifter, MAC Unit & ALU). Bus Architecture & Memory: On-chip memory, organization of on-chip memory, Data Addressing capabilities: Immediate addressing mode, register addressing mode, direct addressing mode, indirect addressing mode and Special addressing modes. Address generation Unit, Programmability & Program execution: Program Control, Program Sequence. Speed issues: Hardware architecture, parallelism, pipelining. Introduction to TMS320C54xx DSP processor, Bus structure, CPU, Data Addressing modes, Memory space.

UNIT-V

Applications of Programmable DSP devices, DSP based Bio-telemetry receiver, A speech Processing System and its implementation of TMS320C54xx processor, An Image Processing System: JPEG Algorithm, Encoding & Decoding Using TMS320C54xx.

Suggested Reading:

1. Proakis John G, Dimitris G. Manolakis, Digital Signal Processing, Third Edition, PHI 2005. (Units 1,2 &3).
2. Avtar Singh, S.Srinivasan, Digital Signal Processing Implementations Using DSP Microprocessors with Examples from TMS320C54xx, THOMSON BROOKS/COLE, 2004. (Units 4 & 5)
3. Jonathan (Y) Stein, Digital Signal Processing A Computer Science Perspective, WILEY-INDIA, 2000.
4. Vinay K. Ingle, John G. Proakis, Digital Signal Processing using MATLAB, THOMSON BROOKS/COLE, 2004.
5. Phil Lapsley, Jeff Bier, Amit Shoham, Edward Lee, DSP Processor Fundamentals: Architectures & Features, WILEY-INDIA, 1996.