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The Department of ECE, MVSR Engineering College has conducted a 1-Week Faculty Development program on “Analog, Digital and Mixed Signal Design using Mentor Graphics Tools” during 24-29, Sep, 2018 which mainly concentrated on bridging the gap between academics and industry.

On 24th Sep 2018, the Inaugural function started with a prayer song by Sree Kalpa of IV Year C Section, followed by lightning the lamp. Head of the Dept, Dr B.Sarala, Principal, Dr G.Kanaka Durga and Chief Guest Dr P.Vijaya Sanakar Rao has addressed the gathering.

Dr SP Venu Madhava Rao, Convener, has briefed about the workshop. Mrs SV Manimala, Co-Convener, has briefed that there were 26 participants which included Faculty, Research Scholars, PG students from various engineering colleges.

Later after a short break, the key note speaker Dr Vijay Sanakar Rao, Professor, University of Hyderabad, has delivered a lecture on “Recent Trends in “Analog, Digital and Mixed signal VLSI Design”. From 24^th afterNoon to 27^th Sep, There were Hands-on session on mentor graphics tools by experts from Coreel Technologies.

On 28^th Sep, 2018, there was visit to GAETEC by all the participants.

On 29th Sep, 2018, there was a session by Mr D.Shravan Kumar, Scientist, ANURAG, DRDO. After the Lunch at 2.00 PM, Valedictory function was held. The chief Guest Dr G. Kanaka Durga, Principal, MVSREC, has addressed the gathering. The certificates were distributed to the participants by the Principal, Head of the Dept and the convener and co-convener.

This program was a great experience to the participants who were keen in enhancing their knowledge in VLSI Design. Feedback from the participants about the program was excellent and suggested that it would be much better if conducted during the Semester break. All the participants appreciated program co-ordinators Ms. B.Bhavani and Ms.S.Aruna for their efforts in making the event successful.