EFFECT FROM THE ACADEMIC YEAR 2013 - 2014

 

EC 432

ELECTRONIC DESIGN AND AUTOMATION LAB

Instruction                                                                                                                                                                                       3   Periods per week

Duration of University Examination                                                                                                                                                   3   Hours

University Examination                                                                                                                                                                     50 Marks

Sessional                                                                                                                                                                                         25 Marks

 

Part A

Write the Code using VERILOG, Simulate and synthesize the following

1.         Arithmetic Units: Adders and Subtractors.

 

2.         Multiplexers and De-multiplexers.

 

3.         Encoders, Decoders, Priority Encoder and Comparator.

 

4.         8-bit parallel adder using 4-bit tasks and functions.

 

5.         Arithmetic and Logic Unit with minimum of eight instructions.

 

6.         Flip-Flops.

 

7.           Registers/Counters.

 

8.            Sequence Detector using Mealy and Moore type state machines. Note:-

 

1.         All the codes should be implemented appropriately using Gate level, Dataflow and Behavioral Modeling.

 

2.         All the programs should be simulated using test benches.

 

3.         Minimum of two experiments to be implemented on FPGA/CPLD boards.

 

Part B

 

Transistor Level implementation of CMOS circuits

 

1.      Basic Logic Gates----------------: Inverter, NAND and NOR.

 

2.    Half Adder and Full Adder. 3. 4:1 Multiplexer.

 

4. 2:4 Decoder.

 

Mini Project:

 

i)      8 bit CPU           (ii) Generation of different waveforms using DAC

 

iii)         RTL code for Booth’s algorithm for signed binary number multiplication

 

iv)       Development of HDL code for MAC unit and realization of FIR Filter.

 

v)         Design of 4-bit thermometer to Binary Code Converter