|
Scholastic Performance:
|
Course
|
Board/ University
|
Specialization
(if any)
|
Year of Completion
|
% of Marks Obtained
|
|
Class - X
|
Central Board of Secondary Education
|
|
1982
|
70
|
|
Class-XII
|
AISSCE, CBSE
|
M.BiPC
|
1984
|
67
|
|
B.Tech.
|
Nagarjuna University
|
Electronics & Communication Engg.
|
1989
|
68
|
|
M.E.
|
Osmania University
|
Systems & Control Engg.
|
1997
|
86
|
|
Ph.D
|
JNTU, Hyd
|
Low Power VLSI Design
|
2010
|
Awarded
|
9. Teaching Experience:
|
S.
No
|
College
|
Designation
|
Period
|
Experience in years
|
|
|
MVSR Engineering College,
Hyderabad.
|
Professor in ECE
|
|
|
|
1
|
MVSR Engineering College,
Hyderabad.
|
Professor & Head in IT
|
|
|
|
2
|
MVSR Engineering College,
Hyderabad.
|
Professor & Head in ECE
|
|
|
|
3.
|
MVSR Engineering College,
Hyderabad.
|
Professor
|
October 2010 to till date
|
3 Yrs
|
|
4
|
MVSR Engineering College, Hyderabad
|
Assoc. Professor
|
June 2001 to September 2010
|
10 Yrs 3 months
|
|
4
|
MVSR Engineering College, Hyderabad
|
Lecturer/ Asst. Prof.
|
- 1991 to June 2001
|
10 Yrs
6 months
|
Achievements/ Awards:
- First rank in M.E (System & Control Engg.)
- Received the “Best Teacher” award 3 times in ECE Dept. of our college in the years 2001, 20022010.
List of Journal Papers Published-5
|
1
|
G.Kanaka Durga
|
Design & Analysis of low power 1-bit full adder in 50nm CMOS technologies
|
IETECH Journal of Communication Techniques
Vol:2, No:2, pp-49-52
|
2008
|
International
|
|
2
|
G.Kanaka Durga
|
Low power 1-Bit Full adder in 70nm CMOS technology
|
Journal of Jawaharlal Nehru Technological University, Technology Spectrum, Vol . 3, No. 1, March, 2009, pp 23-26
|
2009
|
International
|
|
3
|
G.Kanaka Durga
|
Low power adder operated on multiple supply voltages
|
Research journal of Engineering and Technology, , Vol.2, issue -2, pp 39-42 JNTU, Ananthpur
|
2009
|
International
|
|
4
|
G.Kanaka Durga
|
1-Bit Full adder Cell operated on Dual supply Voltages
|
IETECH Journal of Electrical Analysis, Vol.3, No.1, 2009, pp 31-34
|
2009
|
International
|
|
5
|
G.Kanaka Durga
|
Area optimized arithmetic and logic unit using low power 1-bit full adder
|
International Journals of Electronics ,Communication and Instrumentation Engineering research and development ISSN : 2249-684X, Vol-3, Issue-3, p.p no: 115-120
|
2013
|
International
|
|
|
|
|
|
|
|
List of Conference Papers Presented:17
|
1
|
Embedded DSP for
Wireless communication state of art
|
National Conference on Signal Processing and Communications (SPCOM)
|
5-6 Dec 05
|
SNIST, Hyd
|
|
2
|
Digital Mixer
|
(ICSCI-06)
|
4-8- Jan-o6
|
Pentagram Research
Centre, Hyd.
|
|
3
|
Implementation of Various Network Security Algorithms in FPGA
|
All India Seminar on “ Role of telecommunications
for Betterment of Society”
|
|
Institution of
Engineers Hyd
|
|
4
|
Low Power VLSI Design
|
National Symposium
|
23 Feb 2003
|
BRECW, Hyd
|
|
5
|
Determination of GPS Receiver position using Linearization and
Bancroft Algorithm
|
Electro 2005
|
3-5 Feb 2005
|
BHU
Banaras
|
|
6
|
Power Minimization Techniques
|
National Conference on Intelligent Systems and Networks
|
25-26 Feb 05
|
Haryana Engineering College Jagadhri
|
|
7
|
Linearization error in ground transmitters
|
National Conference on Intelligent Systems and Networks
|
25-26 Feb 05
|
Haryana Engineering College
|
|
8
|
Loop Filter Design in CPPLL
|
NCARM
|
5-6th mar 05
|
GVPCE, Visakapatnam
|
|
9
|
Multipath effect and Near–far Problems
|
NCARM
|
5-6th mar05
|
GVPCE, Visakapatnam
|
|
10
|
Design of loop filter for synchronous Pseudolite Navigation Systems using PLL
|
ICSCI-06
|
4-8th jan06
|
Pentagram Research centre Hyd
|
|
11
|
”Performance Analysis of Low Power 1-bit Full Adder Cells “
|
National Symposium on Nano Electronics
|
15th Dec, 2007.
|
Vaaag Devi College
of Engg., Warangal
|
|
12
|
New Level Restoring 1-Bit Full Adder
|
National Conference on Electronics, Communications and Computers (NECC-2009)
|
13th & 14th Feb,2009
|
IETE, Navi Mumbai, Sub Centre
|
|
13
|
A New Low Power Low Voltage VLSI Cell
|
National Conference on Futuristic Advancements in Computing and Electronics (FACE_09)
|
19th to 21st March, 2009
|
DCET, Hyderabad
|
|
14
|
New Low-Power Low-Voltage Multiplier Cell Operated on Multiple Supply Voltages
|
National Women’s Conference on Exploring Potentials of Women in Engineering
|
3rd -4th July, 2009
|
Charotar Institute of Technology, Changa, Gujarat
|
|
15
|
Low Power Low-Voltage Level Restoring Full Adder Cells
|
International Conference on Future Engineering Trends (ICFET 2K10)
|
29th & 30th
April, 2010
|
Saveetha School of Engg. Saveetha University, Chennai.
|
|
16
|
Design and Analysis of New VLSI Cell
|
Recent Trends in Communication Technologies & VLSI Design (RTCTV-2010)
|
2nd & 3rd June, 2010
|
Vardhaman College of Engineering , Hyd
|
|
17
|
Design and implementation of Signal conditioning circuit for MEMS based capacitive accelerometer
|
International conference on Innovation in Electronics and Communication Engg (ICIECE)-2012
|
20th & 21st July,2012
|
GNIT, Ibrahimpatnam, Hyderabad
|
List of Books Authored: Nil
Professional bodies in which Membership is taken: ISTE member ship no. 15999, MIEEE(Branch Advisor WIE)
Number of Conferences/ Workshops/ Seminars attended: 10
Hobbies: Cooking, Listening to music, Painting .
|
